Traditional wafer Sort is a critical part of the high-volume manufacturing process of semiconductor devices. This test step enables the producer to test multiple dice at the same time and then select only the functional die that can then be packaged, tested downstream and ultimately shipped to customers. As such, it serves as the first screen for die manufactured by the Fab. While extremely useful for a wide variety of silicon architectures, its main drawback is that it requires using massive metallic chucks that can support the full wafer dimensions. This naturally introduces a lag in the system’s ability to respond to power and temperature fluctuations on the device under test that occur when test content is executed. Thus, the very design of the system sets a limit on the type of test content that can be used in this step with most of the power intensive content shifting right to Class Test after package assembly. However, as disaggregation becomes the industry standard integrating devices of very different architectures and process steps into a single package, there is a need to enable more aggressive test content at Sort to improve yield of a final packaged unit downstream. In this presentation, we will discuss the advantages of Singulated Die Sort over the traditional equipment, that significantly extends the envelope of Sort to enable higher coverage to screen defects on the silicon before package assembly. We will compare the thermal capability of different equipment side-by-side under the same conditions and show the advantages of the new system.