Co-Founder and Chief System Architect
Cerebras
Jean-Philippe (J.P.) is Chief System Architect at Cerebras Systems. Before co-founding Cerebras, J.P. was Senior Hardware Architect at rack-scale flash array startup DSSD (acquired by EMC). Prior to DSSD, J.P. was Lead System Architect at SeaMicro where he designed three generations of fabric-based computer systems. Earlier in his career, J.P. was Director of Hardware Engineering at Alcatel-Lucent and Director of Hardware Engineering at Riverstone Networks. He holds an MS in Electrical Engineering from École Polytechnique Fédérale de Lausanne, Switzerland, and has authored 24 patents.
Disclosure information not submitted.
Hyperscaling connectivity with the Cerebras Wafer-Scale Engine
Wednesday, July 10, 2024
10:50am – 11:10am PDT
Panel Discussion & Audience Q&A
Wednesday, July 10, 2024
11:20am – 12:45pm PDT