Fellow, Corporate Innovation Division
Tokyo Electron LImited
Minato-ku, Tokyo, Japan
Tomonari Yamamoto received the B.S., M.S., and Ph.D. degrees in electrical engineering from Keio University, Yokohama, Japan, in 1997, 1999, and 2008, respectively. From 1999 to 2008, he was with Fujitsu Ltd., Tokyo, Japan, where he worked on process integration and device design for 90nm and 45/40nm CMOS technologies. From 2008 to 2016, he was with Taiwan Semiconductor Manufacturing Company (TSMC), Ltd., Hsinchu, Taiwan, R.O.C., where he was the device/integration manager of the R&D platform technology team. He led the device teams of 28nm high-K metal-gate CMOS SoC technology for high-performance mobile applications (28HPM), 16nm FinFET CMOS technology for high-performance computing and mobile applications (16FF+), and also worked as the integration manager of 7nm FinFET CMOS technology for the specific customers' product development. He is currently with Tokyo Electron Ltd. (TEL), Tokyo, Japan. As of July 1st, 2024, he holds a position as a Fellow working for the corporate innovation division to determine the corporate development strategy. He has published more than 30 papers in journals and conference proceedings including invited talks. He is an active member of subcommittee on Emerging Device and Compute Technology of the IEEE International Electron Devices Meeting (IEDM), and was a member of subcommittee on CMOS Devices and Technology of the IEDM 2008, 2009, and IEEE International Conference on Interconnect Technology (IITC) 2019.
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Advanced logic process technologies toward 10A and beyond
Thursday, July 11, 2024
11:15am – 11:35am PDT