This paper presents a terahertz (T-ray) cameraless imaging and profile mapping technique for a whole wafer with fabricated dies, and a criterion to sort out the good dies for packaging. The current art of electrical multiprobe testing is very slow and perfomance limited. It is almost impossible to test the thousands of dies on a wafter for choosing the good ones. Reportedly, the foundries are suffering a minimum rejection rate of ~30% even for the perfected process flow. This is a tremendous loss for 200 mm and 300 mm foundries. This high rejection rate is driving down the yield [1] that leads to significant loss in revenue. The proposed T-ray technique can pinpoint the defective dies and help choose the good dies for packaging. This improves the yield. Here, a 200 mm patterned wafer was imaged, and profile of the entire wafer was recorded (see Fig. 1). The profiles are exploited to devise a criterion for quantifying die to die inconsistencies which in turn is used for sorting the good dies suitable for packaging. The profiles of the dies were analyzed to test the proposed criterion where a known good die’s profile is used as the reference to compare with the profiles of other dies numbered from 1 to n, on the same wafer. Each die’s profile is readily compared with the reference. The mathematical criterion derived from the die profile thus allows one to pick the good dies that will pass. A stratagem for decoupling wavelength dependence on image formation was deployed whereby the Abbe diffraction limit is overcome, and high-resolution image is generated by bigger wavelength T-ray. The technique introduced here has a few components. First, the cameraless imaging of the whole wafer via T-ray nanoscanning, where the scanned intensity matrix (the BLR matrix) is converted to image by an algorithm. Second, the profiles of the dies are generated and recorded against each numbered die. The profiles of each die are compared to the reference on the fly. The dies are then accepted or rejected based on the criterion. The reference die will be easily chosen at the Fab by the operator by taking the profile of a functional die. Thus, the criterion can be extended to the entire wafer by profiling a known good wafer as the reference. The profile map of the reference is then used to compare with the profile maps for the wafers from the same batch. With further development, the T-ray profile mapping system may be installed for the in-line inspection of wafers in a batch. (Need to add an image).
REFERENCES [1] Nicola Campregher, Peter Y.K. Cheung, George A. Constantinides, and Milan Vasilko, “Analysis of Yield Loss due to Random Photolithographic Defects in the Interconnect Structure of FPGAs,” Proceedings of the 2005 ACM/SIGDA 13th In-ternational Symposium on Field-Programmable Gate Arrays - FPGA ’05. DOI:10.1145/1046192.1046211.
Keywords: T-ray cameraless imaging; whole-wafer imaging; profile mapping; on-wafer die sorting; criterion for good die; high resolution imaging with bigger wavelength.
