Challenges in testing SiC and GaN semiconductors

In the world of semiconductor testing, Silicon Carbide (SiC) and Gallium Nitride (GaN) are two materials that have been gaining significant attention. They have become increasingly popular in various applications such as power electronics, RF devices, and LED lighting due to their high breakdown voltage, low on-state resistance, and high electron mobility. These properties make them ideal for use in high-power and high-frequency applications, offering improved efficiency and performance compared to traditional silicon-based semiconductors. However, testing these devices comes with its own set of challenges that manufacturers need to overcome.
Firstly, SiC and GaN semiconductors are designed to operate at higher voltages than traditional silicon devices, which poses challenges in creating test setups capable of handling these high voltages without breakdown. Test equipment should be able to perform ISO, DC and AC tests, adapting resources and configurations along the manufacturing process, from wafer level to the final product test.
A second testing challenge is related to the design of a signal path with minimal stray inductance. This is critical to minimize voltage overshoots during commutation. A third critical challenge is to ensure high voltage testing for SiC KGD devices. The absence of a molded package around the Silicon, combined with the increasingly high breakdown voltage of these products, requires a careful design of the contact elements in order to avoid arching which could prevent the devices from reaching the desired testing voltage.
The presentation will show how, by utilizing advanced technologies and techniques, manufacturers can overcome these challenges and ensure the success of their power semiconductor testing process.